Implementation Engineer – Blaxton, South Yorkshire
Do you have a passion to shape the future of chip design? In the Systems group at Arm, we offer the rare opportunity for an ambitious experienced physical implementation engineer to join our successful team in a dynamic and diverse role!
Arm is building a team to develop best-in-class silicon demonstrators based on Arm’s IP compute sub-system solutions and addressing markets such as premium mobile, infrastructure, and automotive. Using the latest nodes, e.g. 3nm today and utilizing the latest SoC 2.5D and 3D packaging developments, Arm’s initial ambition is to demonstrate industry best-in-class performance by architecting, designing, implementing, and fabricating leading-edge silicon test chips. This is an exciting and unique initiative, where we are bringing in state-of-the-art talent and expertise from across the semiconductor industry to drive how the next generation of leading compute on Arm devices are built across the industry opening up significant potential for the future!
As an implementation engineer, you’ll be influencing RTL development to optimize the power, performance, and cohesiveness of Arm’s solutions, whilst innovating, evolving and deploying our next generation of implementation flows. You’ll wield influence over the development of EDA tools and drive EDA development in building and taping out groundbreaking development platforms to showcase Arm IP and demonstrator chips to prove new concepts in silicon on advanced silicon process nodes.
Responsibilities:
- Physical implementation of Arm System IPs & complex subsystems (Premium Smartphone, Large screen compute & Infrastructure subsystems) using the entire physical implementation flow from Synthesis, floorplanning, Place & route, Backend verification (DRC/LVS) to STA
- Objective would be to optimize performance power and area as required across a range of technology nodes and demonstrate the best in class implementation of our designs
- Work closely with design team and influence system micro architecture to develop products that will complement physical design
- Collaborate with our chip design partners to support their physical implementation success
- Collaborate with our EDA vendors to develop and deploy new methodologies to improve implementation efficiency and results
- Convert ground-breaking and innovative R&D concepts into real implementation solutions
Required skills and experience:
- A STEM degree in a relevant field, such as electronics engineering or computer science
- Good understanding of the concepts related to Synthesis, Place & Route, Clock tree synthesis, constraint development, timing closure and knowledge of hardware languages: Verilog/System verilog
- Working experience with tools like DC/Genus, ICC2/Innovus, Primetime/Tempus and other relevant tools required for physical implementation
- Algorithmic thinking, with well-tested programming ability in Tcl, Make and Linux shell
- The ability to analyse problems, reason logically about solutions and chart the appropriate course to take
- Experience in architecting and embracing new silicon implementation techniques and methodologies
- Be able dream big, explore new ideas and communicate them effectively
- Excellent interpersonal and teamwork skills
‘Nice to have’ skills and experience:
- Knowledge of microprocessor architecture, Arm IP and Arm-based SoCs
- Past experience with programming languages for data processing and presentation – along the lines of Python, JavaScript, HTML, SQL, MatLab
- Experience with RTL design in an HDL such as Verilog, System Verilog or VHDL
- Experience with low power design techniques – clock and power gating, voltage/frequency scaling, retention
- Understanding of power delivery and experience of static and dynamic IR-drop analysis
- Experience of physical verification (LVS and DRC) flows
- Experience with DFT/ATPG tools and/or production testing
We are an equal opportunity employer and value diversity at our company. We do not discriminate on the basis of race, religion, colour, national origin, sex, gender, gender expression, sexual orientation, age, marital status, veteran status, or disability status. We will ensure that individuals with disabilities are provided reasonable accommodation to participate in the job application or interview process, to perform essential job functions, and to receive other benefits and privileges of employment. Please contact us to request accommodation.
